DAC Presentation - 141107 -MB- DANDE TRAINING PRESENTATION -ENG.ppt
Digilent Presentation
Transcript of Digilent Presentation
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Beyond Theory
Intro to Digilent Open Courseware on
Nexys3, Spartan 6 based
Yao QiDigilent China
December, 2011
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Agenda Digilent and Engineering Education
Digilent FPGA platform
Top University Teaching Case
Open Courseware
Digilent Design Contest
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Digilent RomaniaMircea Dabacan, Ph.D.
Hardware/software design
Pullman, WA Main Office Clint Cole, PresidentEngineering Design & Management
Digilent TaiwanBen Liu, MSEE
Manufacturing, ME design
Digilent ChinaFrank Zhao, Ph.D.
Sales and marketing
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Engineering is an applied skillApplied skills are learned through practice
Imagine learning to ride a bicycle just
by reading about it!
Step 1: Swingleg over bike and
place feet onpeddles withoutfalling.
Step 2: Pushforward and startpeddling. Enjoyfeeling of glidingdown roadway.
Step 3:Important! Maintain
balance while riding.Falling may lead toinjuries.
Step 4:Alwayspractice ridingbefore getting onbicycle for firsttime to avoid fallingoff.
Good Luck!
To learnengineering
students must doengineering
What I hear, I forget. What I see, I remember. What I do, I understand. Confucius
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An Improved Learning Model
Hands-onexperience is the keyEvery Student, Every Assignment (ESEA)
Students learn more, faster, andbetter with unrestrictedaccess
to design tools
overall learning improves when
applied design skills taught early;
overallperformance improves
when design skills used frequently*
I never teach my pupils; I only attempt to provide the conditions in which they can learn. Albert Einstein
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Teaching Platforms for Every Level
Virtex5
Virtex2 Pro
Spartan3E
Spartan6
1 2 3 4 5 6 7 8 9 10 Year
Boardfeatures/complexity
Basys2:Logic
Nexys2:Control
Spartan 3E:Multi
Genesys: SystemsAtlys: Systems and Video
XUPV5:Systems Design
NetFPGA: Networking
XUP V2Pro:Systems
B.S M.S Ph.D
Nexys3: Multi
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Nexys3:Teaching Platform
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Nexys3
Computational Horsepower
Spartan6(XC6SLX16-CSG352)
14579 Logic Cells 2278 Slices, 18224 Flip-Flops
32 DSP 48A1
32 x 18Kb block RAM
232 User I/O 4 DCMs and 2 PLL
LUT-6 CLB
BlockRAM
I/O
Hardened Memory
Controllers
High-performance
Clocking
DSP Slices
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Nexys3Memories Memory in FPGA
136Kbit Distributed Memory
576Kbit Block RAM
Memory on Board 128Mbit Cellular RAM
128Mbit PCM Parallel Flash 128Mbit PCM Quad-mode SPI
Flash LUT-6 CLBBlockRAM
I/O
Hardened Memory
Controllers
High-performance
Clocking
DSP Slices
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Nexys3Basic Interfaces GPIO
8 Slide Switches
5 Push Buttons
4-digit 7 Segment Display
8 LEDs
Display VGA
Ethernet 10/100 SMSC LAN8710
PHY
USB Ports USB-UART
USB-HID(OTG) High-speed USB2
peripheral port
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Nexys3Expansions
PMODs
VMODs
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Pmods Small I/O interface boards
Extend the capabilities of any Digilent board
Standard interface Examples:
A-D and D-A converter Temperature, Microphone RS232, PS2 Motor control LEDs, Switches, Buttons WIFI, RF module Bluetooth module
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Vmods Expand the capabilities of
many of our FPGA/CPLDboards
High parallel databandwidth
Examples: VmodCAM
VmodTFT VmodMIB
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Demos On Nexys3 Super Mario
Music Synthesizer
Music Synthesizer with RF
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Super Mario
N2A03ENT_CPU
PPU
CPU Mem
PPUVRAM
ControlSignals
PmodAMPPWM
VGA
Spartan6 FPGAJoypad
interface
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Music SynthesizerMusic Synthesizer
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Music Synthesizer
Receiver
PWM
Xilinx FPGA
RxD
5
SPI
IRQPmod
AMPPWM
out
7
4
LEDs
BTNs
Debug
SW(7:0)
Clk
Clk
JA
JD
4
RST
16RX
Address
Data
Config
Clk
RXRcvRXRcv
3
Tone
Mode
Synth
Clk
8Audio
BTN(3..0)
LED(7..0)
100MHz Clk
RF1
Music Synthesizer Add RF Receiver
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Additional: VmodCAM with
Ethernet & USB Data Transmission
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Where to learn more
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Xilinx University Program
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Digilent Inc. Website
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Digilent CN Chinese Community
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Xilinx China Forum
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Baylor University Brigham Young University California Polytechnic State University Georgia Institute of Technology Johns Hopkins University Michigan State University Massachusetts Institute of Technology
Oregon Institute of Technology Penn State College of Medicine
Pennsylvania College of Technology Princeton University Purdue Rose-Hulman Institute of Technology San Jose State University Stanford
Texas A & M University University of California Long Beach University of Illinois Champaign UC Berkeley
USC US Naval Academy University of Washington Illinois Institute of Technology Vanderbilt University Yale University
Agilent Technologies Analog Devices Cyprus Microsystems Embedded Flight Systems, Inc GE Global Research Center Goodrich Corporation Hewlett-Packard Company Jet Propulsion Lab Los Alamos National Laboratory
Maryland Procurement OfficeDOD Matsushita Avionics Systems Corp Maxim Integrated Products Medtronic Microelectronics Center NASA / LARC National Instruments National Semiconductors Philips Semiconductors Philips Ultrasound Radiation Monitoring Devices Raytheon Missile Systems Robotic Surgical Tech, Inc. Sandia National Laboratories Sanyo Semiconductor ST Microelectronics Tektronix Xerox
Xilinx
Some Customers in USA
90% of TOP US Schools use Digilent products.
ACADEM
ICCUSTOMERS
INDUS
TRYCUSTO
MERS
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6.111:Introductory DigitalSystems Laboratory
6.375:
Complex DigitalSystems
6.190:Rapid Prototyping ofEmbedded Systems
Using FPGA
6.173:Multicore SystemsLaboratory
MIT
EE108A:Fundamentals ofDigital Logic
EE108B:ComputerOrganization &Design
.
.
.
Stanford
CS150Digital Design andComputerArchitecture
CS152ComputerArchitecture andEngineering
CS252Graduate ComputerArchitecture
UC Berkeley
Top University Teaching Case
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UC Berkeley:CS150
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UC Berkeley:CS150
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UC Berkeley:CS150
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UC Berkeley:CS150
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UC Berkeley:CS150
Executes most commonly used MIPS instructions. Pipelined (high performance) implementation. Serial console interface for shell interaction, debugging. Ethernet interface for high-speed file transfer. Video interface for display with 2-D vector graphics acceleration. Supported by a C language compiler.
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ZJU Teaching caseLogic & Computer Design Fundamental
Spartan3
Principles of Computer
Spartan3
Computer Architecture
Spartan3E
Embedded System Design
XUP V2 pro
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ZJU:QS-1
QS-1: 32 bit RISC CPU
MIPS-I(TM) instructions 5 pipeline
Running C program
I/O device UARTPS/2 controllerVGA controller
Interrupter handler
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ZJU:QS-1
Board
VGAInterface Controler Datapath
PS/2
Interface
RS-232Interface
CPU
VRAM Memory(256K32bit)
Controe
rsignal
Address
signals
Data
signals
BUS Interface
18
VRAM
Address
VRAM
Data
FPGA
DBUS
ABUS
32
PCTerminal
KEY
Board
VGA
Monitor
R
GB
signals
CACHE
MMU
Dynamic
Pipeline
Interrupt
Process
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Yes, FPGA Can
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Open Courseware on Nexys3
Digital
Logic
Design
Digital
Signal
Processing
Microcomputer
Principle
Embedded
System
Design
Embedded
OS
Basic Advance SOC OS
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Open Courseware on Nexys3
OpenCourseware
LabSolution PPT
LabSourcecode
TeachingMaterials
Labmanual Open and Share on
www openhw org
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Digital Logic Design Target
undergraduate
Objective : Learn the Elements of Digital Circuit
Use Verilog, Implement Digital Circuit on a FPGA
Learn Xilinx FPGA Logic Design Flow
Websitewww.openhw.org
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Digital Logic Design 15 basic labs
Basic Logic gate Circuit
Adder Encoder
. . .
Shift Register
PWM Generator VGA Controller
PS/2 Controller
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DSP with FPGA Target Undergraduate/Postgraduate
Objective Use Matlab Simulink tools
Use Xilinx DSP toolsSystem Generator
Use FPGA to verify the arithmetic
Website www.openhw.org
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DSP with FPGAI/O Blocks (IOBs)
Configurable
Logic Blocks
(CLBs)
Clock Management
(DCMs, BUFGMUXes)
Block SelectRAM
resource
Dedicated
multipliers
Programmableinterconnect
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DSP with FPGA
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DSP with FPGAs 6 Labs
Nexys3 board and Design Tools
Basic Arithmetical CircuitImplementation
FIR Filter Design
Digital Controlled Oscillator Design
CIC Filter Design
CORDIC Vector Length Calculation
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Microcomputer Principle Target
Undergraduate/Postgraduate
Objective Learn Basic Principle of Microcomputer
Learn Structure of CPU8086
Learn Assemble Language
Website www.openhw.org
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Microcomputer Principle HT-LAB: CPU8086
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Embedded System Design Target
Undergraduate/Postgraduate
Objective Learn Xilinx Embedded System Development Flow
Learn Structure of SOC and AXI4 bus
Design IP core
Learn Hardware and Software Co-debugging
Website www.openhw.org
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M_AXI_DC
M_AXI_IC
M_AXI_DP
Embedded System Design
MB_DEBUGJTAG
Spartan6
MicroBlaze
BRAM
MDM
AXI-EMC SRAM
DIP
PUSH
RS232
GPIO
GPIO
UART
AXIInterconnect
AXIInterconnect
AXI4
AXI4-Lite
AXI4-Lite
AXI4-Lite
Embedded Hardware System
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Embedded System Design 6 Labs
Basic Embedded System Design
SRAM IP Controller Design LED GPIO Controller Design
PWM IP Controller Design
Interrupt Controller IP Design
Hardware and Software Co-debugging
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Embedded OS Target Undergraduate/Postgraduate
Objective Learn Xilinx EDK tools
Learn Linux Kernel Configure and Compile
Learn SOC Design Based on MicroBlaze
Run Embedded Linux on FPGA Website
www.openhw.org
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Embedded OS 6 Labs
Base System for LinuxKernel and Hardware Test
DTS Generation andKernel Compilation
Hello World Application
/proc Entry Read & Write My Led Hardware Part
My Led Driver Part
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Digilent Design Contest
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DDC ShowcaseProject : BitHound: 32-Channel Logic analyzerPlatform:AtlysAuthor: Lukas Schrittwieser, Mario MauererFrom: ETH Zurich, Switzerland
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DDC ShowcaseProject :Smart Shopping CartPlatform: Nexys2Author: Liansheng Chen ,Liming Qu, Chuan ZhangFrom: Beijing University of Technology, Beijing China
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DDC ShowcaseProject : High-Speed Touch screen OscilloscopePlatform: Nexys2Author: Cristian CulmanFrom: Politehnica University, Timisoara Romania
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More Showcase www.digilentinc.com Showcase
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Thanks